1. Field of the Invention
The present invention relates to a booster circuit having a charge pump circuit for boosting a power supply voltage, and a voltage supply circuit having the booster circuit.
2. Background Art
Conventional semiconductor storage devices, such as a NAND flash memory, have a booster circuit that supplies the power supply voltage after boosting the voltage by means of a charge pump circuit.
Semiconductor storage devices, such as a NAND flash memory, require a potential higher than the power supply voltage to carry out data writing, erasing and reading. Thus, the booster circuit for such semiconductor storage devices has a charge pump circuit for boosting the power supply voltage and a voltage detecting circuit for keeping the potential at a preset potential.
The charge pump circuit for boosting the power supply voltage has MOS transistors and capacitors connected in series to each other, and a CLK signal and a CLKB signal, which are complementary to each other, are coupled to one ends of the capacitors.
The voltage detecting circuit has a voltage dividing circuit and a comparator, and the output terminal of the booster circuit and the ground potential are connected in series to each other via the voltage dividing circuit. The comparator compares a monitor potential output from the voltage dividing circuit with a reference potential.
In order to change the detection level of the voltage detecting circuit, for example, a plurality of n-type MOS transistors connected to the ground potential at the respective sources are connected to a point of connection between the voltage dividing resistors of the voltage dividing circuit, and selection signals are input to the gates of the n-type MOS transistors.
The selection signals designate the set potential of the charge pump circuit. If the output of the charge pump circuit is lower than the set potential, the monitor potential is lower than the reference potential, and the comparator switches the output to “High”, for example. This output brings the charge pump circuit into the active state, and the output of the charge pump circuit is boosted according to the CLK/CLKB signal.
On the other hand, if the output of the charge pump circuit is higher than the set potential, the monitor potential is higher than the reference potential, and the comparator switches the output to “Low”, for example. This output brings the charge pump circuit into the inactive state, the CLK/CLKB signal is blocked, and the boosting operation of the charge pump circuit is stopped.
As described above, the output of the charge pump circuit can be maintained in the vicinity of the set potential by the voltage detecting circuit bringing the charge pump circuit into the active or inactive state.
In the boosting operation described above, the output voltage is not always kept at a constant potential and fluctuates around the set potential. This phenomenon is referred to as ripple, and the ripple increases or decreases according to the RC time constant, which is based on the resistances of the voltage dividing resistors, the delay in operation of the comparator, and the boosting capability of the charge pump circuit. The ripple increases if the resistances of the voltage dividing resistors are high, if the delay in operation of the comparator is high, or if the boosting capability of the charge pump circuit is high.
Supposing that the resistance values of the voltage dividing resistors are fixed, and the same comparator is used, the speed of response of the voltage detecting circuit to a variation in potential of the charge pump circuit is constant. Therefore, the time required to switch the output of the voltage detecting circuit is substantially constant.
Furthermore, the output voltage and output current of the booster circuit are related with each other in such a manner that the output current of the booster circuit is low when the output voltage is high, and the output current of the booster circuit is high when the output voltage is low.
Therefore, when the set potential of the voltage detecting circuit is low, the ripple in the output of the booster circuit increases because the amount of current that can be output in a certain time is large.
On the other hand, when the set potential of the voltage detecting circuit is high, the ripple decreases because the amount of current that can be output in a certain time is small.
By the way, data is written to cells of the NAND flash memory using the potential boosted by the booster circuit.
However, the cells do not have uniform characteristics, and the write enable potential, which enables writing to the cell, is different for each cell.
Thus, in order that writing of the cells can be successively carried out in ascending order of write enable potential, the writing potential is increased in small increments from an appropriate initial value, and the writing operation is carried out every time the writing potential is increased.
To achieve this operation, the voltage dividing resistors of the voltage detecting circuit, which determine the set potential of the booster circuit, are adjusted to provide a booster circuit output at a desired potential that increases in small increments.
When the set potential is changed, as described above, there arises a problem that the ripple in the booster circuit output increases if the set potential is low.
In the writing operation of the cells of the NAND flash memory, if the ripple on the word lines of the selected cells and unselected cells is large, the threshold (Vth) distribution of the cell to be written is expanded, and an erroneous writing to an unselected cell occurs, for example. Thus, it is preferred that the ripple is small.
However, as described above, for a conventional booster circuit, if a low booster circuit output is set by adjusting the voltage dividing resistors of the voltage detecting circuit when writing to a cell with a low write enable potential, a large ripple occurs, and the performance of writing to the cell is degraded.
There has been proposed a conventional booster circuit has a plurality of charge pump circuits that boosts a voltage supplied from a power supply to produce an output voltage, a plurality of CP(charge pump) output controlling circuits that monitor the output voltage and outputs a signal that indicates whether to activate or inactivate the charge pump circuits, an oscillator that receives the output of the CP output controlling circuit (the voltage for OSC controlling operation), and a clock buffer circuit that receives the oscillation output of the oscillator and outputs a signal to the booster circuit (see Japanese Patent Laid-Open Publication No. 11-154396, for example).
The CP output controlling circuits are designed to have different output detecting voltages so that a stepwise operation according to the shift of the output voltage can be achieved.
The conventional booster circuit adjusts the number of charge pump circuits that operate stepwise according to the shift of the output voltage, thereby reducing the ripple for one certain set potential.
That is, the conventional technique is not intended to reduce the ripple for a plurality of set potentials.